Fujitsu MB15E07SL User Manual

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DS04-21358-4E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP
Single Serial Input
PLL Frequency Synthesizer
On-chip 2.5 GHz Prescaler
MB15E07SL
DESCRIPTION
The Fujitsu MB15E07SL is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2.5 GHz prescaler.
The 2.5 GHz prescaler has a dual modulus division ratio of 32/33 or 64/65 enabling pulse swallowing operation.
The supply voltage range is between 2.4 V and 3.6 V. The MB15E07SL uses the latest BiCMOS process, as a
result the supply current is typically 3.5 mA at 2.7 V. A refined charge pump supplies well-balanced output currents
of 1.5 mA and 6 mA. The charge pump current is selectable by serial data.
MB15E07SL is ideally suited for wireless mobile communications, such as GSM (Global System for Mobile
Communications) and PCS.
FEATURES
High frequency operation: 2.5 GHz Max
Low power supply voltage: VCC = 2.4 to 3.6 V
Ultra Low power supply current: I
CC = 3.5 mA Typ (VCC = Vp = 2.7 V, Ta = +25°C, in locking state)
ICC = 4.0 mA Typ (VCC = Vp = 3.0 V, Ta = +25°C, in locking state)
Direct power saving function: Power supply current in power saving mode
Typ 0.1 µA (V
CC = Vp = 3.0 V, Ta = +25°C), Max 10 µA (VCC = Vp = 3.0 V)
(Continued)
PACKAGES
16-pin plastic SSOP
(FPT-16P-M05)
16-pad plastic BCC
(LCC-16P-M06)
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Summary of Contents

Page 1 - MB15E07SL

DS04-21358-4EFUJITSU SEMICONDUCTORDATA SHEETASSPSingle Serial Input PLL Frequency SynthesizerOn-chip 2.5 GHz PrescalerMB15E07SL DESCRIPTIONThe Fuji

Page 2

MB15E07SL10Table 5. Prescaler Data Setting Table 6. Charge Pump Current Setting Table 7. LD/fout Output Select Data Setting (2) Relation betwee

Page 3

MB15E07SL11When designing a synthesizer, the FC pin setting depends on the VCO and LPF characteristics.3. Do Output ControlTable 9. ZC Pin Setting 4.

Page 4

MB15E07SL12Note : PS pin must be set “L” for Power-ON.ONOFFVCCClockDataLEPS(1) (2) (3)tV ≥ 1 µstPS ≥ 100 ns(1) PS = L (power saving mode) at Power ON(

Page 5

MB15E07SL13 SERIAL DATA INPUT TIMING1st data2nd dataControl bit Invalid dataDataClockLEMSB LSBt1 t2 t3t6t5t4t7 ∼ ∼ ∼ ∼ Note : LE should be “L” when

Page 6

MB15E07SL14 PHASE COMPARATOR OUTPUT WAVEFORMfrfpLDDODOtWU tWLNotes : • Phase error detection range: –2π to +2π• Pulses on Do signal during locked st

Page 7

MB15E07SL15 MEASURMENT CIRCUIT (for Measuring Input Sensitivity fin/OSCIN) S • G50 Ω1000 pFS • G50 Ω1000 pF0.1 µF0.1 µF864319101112 1475 213 15 161000

Page 8

MB15E07SL16 TYPICAL CHARACTERISTICS1. fin input sensitivityInput sensitivity − Input frequency (Prescaler: 64/65)Input frequency fin (MHz)Input sensi

Page 9

MB15E07SL172. OSCIN input sensitivityInput sensitivity − Input frequencyInput frequency fOSC (MHz)Input sensitivity VOSC (dBm)100−10−20−30−40−50−600 5

Page 10

MB15E07SL183. Do output currentVDO - IDO VDO - IDO Charge pump output voltage VDO (V)Charge pump output current IDO (mA)Charge pump output voltage VDO

Page 11

MB15E07SL194. fin input impedance 5. OSCIN input impedance12.646 Ω–57.156 Ω1 GHz22.156 Ω–12.136 Ω1.5 GHz33.805 Ω11.869 Ω2 GHz1 : 2 : 3 :4 : 23.715

Page 12

MB15E07SL2(Continued)• Dual modulus prescaler: 32/33 or 64/65• Serial input 14-bit programmable reference divider: R = 3 to 16,383• Serial input progr

Page 13

MB15E07SL20 REFERENCE INFORMATION(Continued)S.GSpectrumAnalyzerOSCINfinDoLPFVCOTest CircuitfVCO = 810.45 MHzKV = 17 MHz/Vfr = 25 kHzfOSC = 14.4 MHzVC

Page 14

MB15E07SL21(Continued)846.000 MHz826.004000 MHz826.000000 MHz825.996000 MHz826.000 MHz806.000 MHz500.0 µs/div500.0 µs/div810 MH→826 MHz within ± 1 kHz

Page 15

MB15E07SL22 APPLICATION EXAMPLE10 kΩ0.1 µF1000 pFOUTPUTVP12 kΩ12 kΩ10 kΩLPFVCO16 15 14 13 12 11 10 9123 4 56 780.1 µF1000 pFTCXO1000 pFLock Det.φR

Page 16

MB15E07SL23 USAGE PRECAUTIONSTo protect against damage by electrostatic discharge, note the following handling precautions:-Store and transport device

Page 17

MB15E07SL24 PACKAGE DIMENSIONS(Continued)C2003 FUJITSU LIMITED F16013S-c-4-65.00±0.10(.197±.004)4.40±0.10 6.40±0.20(.252±.008)(.173±.004).049–.

Page 18

MB15E07SL25(Continued)C1999 FUJITSU LIMITED C16017S-1C-10.325±0.10(.013±.004)3.40(.134)TYP"A"0.40±0.10(.016±.004)2.45(.096)0.80(.031)REFT

Page 19

MB15E07SLFUJITSU LIMITEDAll Rights Reserved.The contents of this document are subject to change without notice. Customers are advised to consult with

Page 20

MB15E07SL3 PIN DESCRIPTIONS Pin no.Pin nameI/O DescriptionsSSOP BCC116OSCIN I Programmable reference divider input. Connection to a TCXO.21OSCOUT O Os

Page 21

MB15E07SL4 BLOCK DIAGRAMClockDatafinLEOSCOUTOSCINPSDOVPφRLD/foutφPPrescaler32/3364/65XfinGNDVCCMDZCCNTSW FC CSLDSfrfp. .. . .. . .(16)(1)(2)(3)(4)(5)(

Page 22

MB15E07SL5 ABSOLUTE MAXIMUM RATINGS WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature

Page 23

MB15E07SL6 ELECTRICAL CHARACTERISTICS(VCC = 2.4 to 3.6 V, Ta = –40 to +85°C)*1 : Conditions; fosc = 12 MHz, Ta = +25°C, in locking state.*2 : VCC = VP

Page 24

MB15E07SL7*3 : AC coupling. 1000 pF capacitor is connected under the condition of Min operating frequency.*4 : The symbol “–” (minus) means direction

Page 25

MB15E07SL8 FUNCTIONAL DESCRIPTION1. Pulse Swallow FunctionThe divide ratio can be calculated using the following equation:fVCO = [(M × N) + A] × fOSC

Page 26 - FUJITSU LIMITED

MB15E07SL9Table 2. Binary 14-bit Programmable Reference Counter Data Setting Note : Divide ratio less than 3 is prohibited.Table 3. Binary 11-bit Pro

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