Fujitsu MB91401 User Manual

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FUJITSU SEMICONDUCTOR
DATA SHEET
32-Bit Proprietary Microcontroller
LSI Network Security System
MB91401
DESCRIPTION
The MB91401 is a network security LSI incorporating a Fujitsu’s 32-bit, FR-family RISC microcontroller with 10/
100Base-T MAC Controller, encryption function and authentication function. The LSI contains an encryption
authentication hardware accelerator that boosts the LSI’s performance for encryption and authentication commu-
nication (IKE/IPsec/SSL) to be demanded further.
The MAC controller has a packet filtering function that reduces the load on the CPU for an increasing amount of
packet processing. In addition, the board has the External interface for high-speed data communication with
various external hosts, USB ports as general-purpose interfaces, and various card interfaces.
FEATURES
Encryption and authentication processing by hardware accelerator function
The LSI performs processing five times faster than by the conventional combination of encryption/authentication
hardware macros and software or about 400 times faster than by software only. In addition, CPU processing load
factor to be involved in the encryption and the authentication processing can be decreased to 1/5 or less.
Also, the LSI uses the embedded accelerator to execute that public-key encryption algorithm about 100 times
faster than by software processing, which generally puts an extremely heavy load microcontrollers.
(Continued)
PACKAGE
244-pin plastic FBGA
(BGA-240P-M01)
Prelminary
2004.11.12
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Summary of Contents

Page 1 - LSI Network Security System

FUJITSU SEMICONDUCTORDATA SHEET32-Bit Proprietary MicrocontrollerLSI Network Security SystemMB91401 DESCRIPTIONThe MB91401 is a network security LS

Page 2

MB9140110(Continued)Pin name Pin no.PolarityI/OCircuitFunction/applicationD31D30D29D28D27D26D25D24D23D22D21D20D19D18D17D16D15D14D13D12D11D10D9D8D7D6D5

Page 3

MB9140111ETHERNET MAC CONTROLLER (17 pin) Pin name Pin no.PolarityI/OCircuitFunction/applicationRXCLK 48  IN DClock input for reception pinMII sync s

Page 4 - PIN ASSIGNMENT

MB9140112EXTERNAL IF (23 pin) Pin name Pin no.PolarityI/OCircuitFunction/applicationEXCSX 50Nega-tiveIN DExternal chip select input pinChip select inp

Page 5 - PIN NUMBER TABLE

MB9140113USB IF (5 pin) Pin name Pin no.PolarityI/OCircuitFunction/applicationUDP 61  I/O CUSB data D + (differential) pinI/O signal pin on the plus

Page 6 - PIN DESCRIPTION

MB9140114CARD IF (41 pin) (Continued)Pin name Pin no.PolarityI/OCircuitFunction/applicationCFD15CFD14CFD13CFD12CFD11CFD10CFD9CFD8CFD7CFD6CFD5CFD4CFD3C

Page 7

MB9140115(Continued)Pin name Pin no.PolarityI/OCircuitFunction/applicationCFCD1X 58Nega-tiveIN ECard connection detect input pin : CFCD1XChecking conn

Page 8

MB9140116I2C IF (2 pin) Power Supply/GND (39 pin) Pin name Pin no.PolarityI/OCircuitFunction/applicationSDA 181  I/O BSerial data line input/output p

Page 9

MB9140117 I/O CIRCUIT TYPE(Continued)Type Circuit RemarksA• With pull/down• CMOS level output• CMOS level input• Value of pull-down resistance = ap

Page 10 - 2004.11.12

MB9140118(Continued)Type Circuit RemarksD CMOS level inputE• With pull-up• CMOS level input• Value of pull-up resistance = approx. 33 kΩ (Typ)F CMOS l

Page 11

MB9140119 HANDLING DEVICESPreventing Latch-upWhen a voltage that is higher than VDDE and a voltage that is lower than VSS are impressed to the inpu

Page 12

MB914012• For DES-ECB/DES-CBC/3DES-ECB/3DES-CBC mode*• For MD5/SHA-1/HMAC-MD5/HMAC-SHA-1 mode• DH group: for 1 (MODP 768 bit) /2 (1024 bit) For the en

Page 13

MB9140120Figure When you share the power supply for digital and for VCOTreatment of the unused pinsLeaving unused input pins open results in a malfunc

Page 14

MB9140121 CONNECTED SPECIFICATION OF MB91401 AND ICERecommended type and circuit configuration of the emulator interface connector mounting on the

Page 15

MB9140122• Precaution when designingWhen evaluation MCU on the user system is operated in the state that the emulator is not connected, shouldbe treat

Page 16

MB9140123JTAGThe JTAG function is installed in this LSI.Note that the terminal INITXI should be input in "L" when using JTAG.Notes when quar

Page 17 - I/O CIRCUIT TYPE

MB9140124• Reference ValueIt is necessary to add C3/L depending on a basic wave and the over tone characteristic of the oscillator of the20 MHz to 30

Page 18

MB9140125•••• Notes as deviceTreatment of Unused Input PinsIt causes the malfunction that the unused input terminal is made open, and do the processin

Page 19 - HANDLING DEVICES

MB9140126CPU• The instruction fetch is not done from D-bus, and does not set the code area on D-bus RAM.• Set neither stack area nor the vector table

Page 20

MB9140127• External bus interface• When the bus width of the area set up as little endian is 32-bit, confine to word (32-bit) access when accessingthe

Page 21

MB9140128 NOTES OF DEBUGStep execution of RETI instructionIn an environment where interrupts frequently occur during single-step execution, only th

Page 22

MB9140129 BLOCK DIAGRAMFR core : CPU, U-Timer, UART, Timer, Interrupt controller, DMAC, Bit search, External interrupt, Memory_IF, Data-RAM, Cache,

Page 23

MB914013(Continued)•••• CARD Interface (CompactFlash)The CompactFlash interface is a memory and I/O mode correspondence. It corresponds to the I/O of

Page 24

MB9140130 MEMORY SPACE• Memory spaceThe FR family has 4 GByte of logical addresses (232 address) which can be linearly accessed by the CPU. Direct

Page 25

MB9140131 GENERAL PURPOSE REGISTERSRegisters R0 to R15 are general-purpose registers. The registers are used as the accumulator and memoryaccess po

Page 26

MB9140132 MODE SETTINGSThe FR family uses the mode pins (MDI2 to MDI0) and the mode register (MODR) to set the operation mode.•••• Mode PinsThree m

Page 27

MB9140133[bit1, bit0] WTH1, WTH0 (Bus width setting bits) These bits specify the bus width. The value of the bits is set in the DBW1 and DBW0 bits in

Page 28 - NOTES OF DEBUG

MB9140134 I/O MAPThis shows the location of the various peripheral resource registers in the memory space.[How to read the table]Note : Initial val

Page 29 - BLOCK DIAGRAM

MB9140135(Continued)AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30000_0060HSSR0 [R/W]00001-00SIDR0 [R/W]XXXXXXXXSCR0 [R/W]00000100SMR0 [R/W]00--0-0

Page 30 - MEMORY SPACE

MB9140136(Continued)AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30000_0308Hto0000_03E0H Reserved0000_03E4H ICHRC [R/W]0-000000Instruction Cache00

Page 31 - GENERAL PURPOSE REGISTERS

MB9140137(Continued)(Continued)AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30000_046CHICR44[R/W]---11111ICR45[R/W]---11111ICR46[R/W]---11111ICR47[R

Page 32 - MODE SETTINGS

MB9140138(Continued)*1 : An initial value is a different register at the reset level. The display is the one at the INIT level.*2 : An initial value i

Page 33

MB9140139(Continued)AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 3010F_0000HBSR[R]00000000BCR[R/W]00000000CCR[R/W]10000000ADR[R/W]1XXXXXXXI2C010F_00

Page 34

MB914014 PIN ASSIGNMENT7273747576777879808182838485868788891234567891011121314151617187113613713813914014114214314414514614714814915015190701351921

Page 35

MB9140140(Continued)* : The attribute is different according to the bit.AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30110_0028HSMI_CMD[R/W]00000000

Page 36

MB9140141AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30114_0000HEXIFRXDR00000000-00000000[R]00000000-00000000External IF0114_0004HEXIFTXDR00000000-

Page 37

MB9140142(Continued)AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30540_0000HFIFO0out[R]XXXXXXXX-XXXXXXXXFIFO0in[W]XXXXXXXX-XXXXXXXXUSB0540_0004HFIFO

Page 38

MB9140143(Continued)AddressRegisterBlock ++++ 0 ++++ 1 ++++ 2 ++++ 30540_0068HST2[R]XXXXXXXX-X0000000ST3[R/W]XXXXXXXX-XXX00000USB0540_006CHST4[R]XXXXX

Page 39

MB9140144 INTERRUPT VECTOR(Continued)Interrupt sourceInterrupt numberInterrupt levelOffsetAddress of TBR defaultRNDecimalHexa-decimalReset 0 00  3

Page 40

MB9140145(Continued)Interrupt sourceInterrupt numberInterrupt levelOffsetAddress of TBR defaultRNDecimalHexa-decimalDMAC3 (end, error) 34 22 ICR18 374

Page 41

MB9140146(Continued) (2) NMI (Non Maskable Interrupt) NMIs have the highest priority among the interrupt sources handled by this module.An NMI is alwa

Page 42

MB9140147 ELECTRICAL CHARACTERISTICS1. Absolute Maximum Ratings*1 : This parameter is based on VSS = PLLVSS = 0 V.*2 : Note that analog power suppl

Page 43

MB91401482. Recommended Operating Conditions (VSS = PLLVSS = 0 V)WARNING: The recommended operating conditions are required in order to ensure the nor

Page 44 - INTERRUPT VECTOR

MB91401493. DC Characteristics• Other than USB (VSS = PLLVSS = 0 V)ParameterSymbolPin ConditionsValueUnitMin Typ Max“H” level input voltageVIH 2.0 

Page 45

MB914015 PIN NUMBER TABLEPin Number Pin name Pin NumberPin namePin NumberPin namePin NumberPin name1 VSS 61 UDP 121 EXD11 181 SDA2 CFD15 62 CFWEX 1

Page 46

MB9140150• USB (VSS = PLLVSS = 0 V)*1 : <About the output short-circuit current>Output short-circuit current IOS is the maximum current that fl

Page 47 - ELECTRICAL CHARACTERISTICS

MB9140151USB Specification Revision 1.1*1 : <Input Levels VIH, VIL>The switching threshold voltage of the USB I/O buffer’s single-end receiver

Page 48

MB9140152*4 : <Output Levels VCRS>The cross voltage of the external differential output signals (D+ and D−) falls within the range from 1.3 V t

Page 49

MB91401534. AC CharacteristicsThe following measurement conditions depending on the supply voltage apply to the MB91401 unless otherwise specified.(1)

Page 50

MB9140154(2) Reset Note : tcp is internal CPU and clock cycle period for peripheral module. ParameterSymbolPin ConditionsValueUnit RemarksMin MaxReset

Page 51

MB9140155(3) Normal memory accessNote : tcycp is external memory clock cycle period. Parameter Symbol Pin Typical timingValueUnit RemarksMin MaxAddres

Page 52

MB9140156(4) Ready inputParameter Symbol Pin Typical timingValueUnit RemarksMin MaxRDY setup trdys RDY MCLKO ↑ 19  nsRDY hold trdyh RDY MCLKO ↑ − 1

Page 53

MB9140157 (5) UARTNote : timcycp is operational clock period of peripheral module built-in FR70E core. Parameter Symbol Pin ConditionsValueUnit Remark

Page 54

MB9140158• Internal shift clock mode• External shift clock modeSCK1, SCK0SOUT1, SOUT0SIN1, SIN0tscyctslovtivshtshixVOL VOLVOHSCK1, SCK0SOUT1, SOUT0SIN

Page 55

MB9140159(6) MII interface • TransmissionParameter Symbol Pin Typical timingValueUnit RemarksMin MaxTXEN delay time tdel_txen TXEN TXCLK ↑ 015nsTXD de

Page 56

MB914016 PIN DESCRIPTIONXINI 1 TXCLK 1INITXI 1 TXD3 to TXD0 4NMIX 1 TXEN 1INT7 to INT5 3 RXCLK 1MDI2 to MDI0 3 RXER 1RXD3 to RXD0 4OSCEA 1 RXDV 1OS

Page 57

MB9140160• ReceptionRXCLKRXDVRXD3 to RXD0thd_rxdvtsu_rxdvtsu_rxdthd_rxdv055RXCLKRXDVRXD3 to RXD0thd_rxdvtsu_rxdvtsu_rxdthd_rxdv0nn−1RXCLKRXERtsu_rxert

Page 58

MB9140161(7) MDIO interfaceParameter Symbol Pin typical timingValueUnit RemarksMin MaxMDIO setup time tsu_mdio MDIO MDCLK ↑ 10  nsMDIO Hold Time thd_

Page 59

MB9140162 (8) External IF• Read accessNote : tcp is internal CPU and operational clock period for peripheral module. Parameter Symbol PinValueUnit Rem

Page 60

MB9140163• Write accessNote : tcp is internal CPU and operational clock period for peripheral module. Parameter Symbol PinValueUnit RemarksMin MaxEX W

Page 61

MB9140164(9) USB interface*1 : The AC characteristics of the USB interface conform to USB Specification Revision 1.1.*2 : <Driver Characteristics

Page 62

MB9140165T×D+T×D−3-StateFull-speed BufferRsRs28 Ω to 44 Ω Equiv. Imped28 Ω to 44 Ω Equiv. ImpedCL = 50 pFCL = 50 pFNotes : • Driver output impedanc

Page 63

MB9140166(10) I2C interface• Input timing specification* : Initial Value : I2C bus standards.• Output timing specification* : For value m, refer to Se

Page 64

MB9140167(11) Card IF• Read accessParameter Symbol PinValueUnit RemarksMin MaxCF Read Cycle time tcfrcCFA10 to CFA0, CFCE2X, CFCE1XnsCFA to Data Val

Page 65

MB9140168• Write accessParameter Symbol PinValueUnit RemarksMin MaxCF Write Cycle time tcfwcCFA10 to CFA0,CFCE2X, CFCE1XnsCFA to Data Setup time tcf

Page 66

MB9140169 ORDERING INFORMATIONPart number Package RemarksMB91401240-pin plastic FBGA (BGA-240P-M01) Prelminary2004.11.12

Page 67

MB914017SYSTEM (9 pin) OSCILLATOR (3 pin) PLL CONTROL (5 pin) Pin name Pin no.PolarityI/OCircuitFunction/applicationXINI 8  IN DClock input pinInput

Page 68

MB9140170 PACKAGE DIMENSION240-pin plastic FBGA (BGA-240P-M01) Note: The actual shape of coners may differ from the dimension.Dimensions in mm (inc

Page 69 - ORDERING INFORMATION

MB9140171MEMOPrelminary2004.11.12

Page 70 - PACKAGE DIMENSION

MB91401FUJITSU LIMITEDFor further information please contact:JapanFUJITSU LIMITEDMarketing DivisionElectronic DevicesShinjuku Dai-Ichi Seimei Bldg. 7-

Page 71

MB914018ICE (9 pin) JTAG (5 pin) TEST (5 pin) Pin name Pin no.PolarityI/OCircuitFunction/applicationBREAKI 76  IN DEmulator break request pinThis pin

Page 72 - FUJITSU LIMITED

MB914019UART (6 pin) MEMORY IF (66 pin) (Continued)Pin name Pin no.PolarityI/OCircuitFunction/applicationSIN1SIN08515 IN DSerial data input pinsSeria

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