Fujitsu MHV2160BT User Manual Page 187
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5.3 Host Commands
C141-E239 5-111
*10 Word 64: Advance PIO transfer mode support status
Bits 15-8: Reserved
Bits 7-0: Advance PIO transfer mode
Bit 1: '1' = Mode 4 supported
Bit 0: '1' = Mode 3 supported
*11 WORD 75: X ' 001F ' (32)
*12 WORD 76
Bits 15-11: Reserved
Bit 10: '1' = Supports the PHY event counter.
Bit 9: '1' = Supports the Power Management initiation request from
the host system.
Bit 8: '1' = Supports the Native command queueing.
Bits 7-4: Reserved
Bit 3: Reserved for SATA
Bit 2: '1' = Supports the Gen-2 signaling rete.
Bit 1: '1' = Supports the Gen-1 signaling rete.
Bit 0: Reserved
*13 WORD 78
Bits 15-7: Reserved
Bit 6: '1' = Supports the software settings preservation.
Bit 5: Reserved
Bit 4: '1'= Supports the in-order data delivery.
Bit 3: '1'= Supports the Power Management initiation from the device to
the host system.
Bit 2: '1' = Supports the DMA Setup FIS Auto-Activate optimization.
Bit 1: '1' = Supports the non-zero buffer offset in the DMA Setup FIS.
Bit 0: Reserved
- MHV2160BT 1
- DISK DRIVE 1
- PRODUCT MANUAL 1
- FOR SAFE OPERATION 2
- Revision History 3
- Preface 5
- Operating Environment 6
- Conventions 6
- Attention 7
- Liability Exception 7
- Important Alert Items 9
- Manual Organization 11
- Contents 13
- Contents 19
- C141-E239 xv 19
- Illustrations 20
- CHAPTER 1 Device Overview 25
- 1.1 Features 26
- 1.1.3 Interface 27
- 1.2 Device Specifications 28
- 1.3 Power Requirements 30
- 1.5 Acoustic Noise 34
- 1.6 Shock and Vibration 34
- 1.7 Reliability 35
- 1.8 Error Rate 36
- 1.9 Media Defects 36
- 1.10 Load/Unload Function 36
- 2.1 Device Configuration 42
- 2.2 System Configuration 43
- This page is intentionally 44
- blank 44
- 3.1 Dimensions 46
- 3.2 Mounting 47
- 3.2 Mounting 49
- Installation Conditions 50
- (4) Ambient temperature 50
- General notes 52
- Installation 52
- Recommended equipments 52
- 4.1 Outline 58
- 4.2 Subassemblies 58
- 4.3 Circuit Configuration 59
- C141-E239 4-5 61
- 4.4 Power-on Sequence 62
- 4.5 Self-calibration 63
- 4.6 Read/write Circuit 65
- 4.6.3 Read circuit 66
- 4.6.4 Digital PLL circuit 67
- 4.7 Servo Control 68
- 4.7.3 Servo frame format 73
- 4.7.5 Spindle motor control 75
- CHAPTER 5 Interface 77
- 5.1 Physical Interface 78
- COMRESET/COMINIT 80
- 106.7 ns 80
- 106.7 ns 106.7 ns 80
- 20-80TX 84
- 5.1.4 Connector pinouts 86
- 5.1.5 P11 function 87
- 5-12 C141-E239 88
- 5.1.6 Hot Plug 89
- Host located layers 90
- Device located layers 90
- 5.2.1 Communication layers 91
- 5.3 Host Commands 105
- Interface 106
- 5-30 C141-E239 106
- 5.3.2 Command descriptions 108
- 5-88 C141-E239 164
- Word Value Content 164
- 5.3 Host Commands 165
- C141-E239 5-89 165
- Bit 0: Reserved 187
- Setup FIS 188
- 01h (*1) 198
- • WRITE MULTIPLE FUA EXT 207
- • WRITE DMA FUA EXT 207
- • READ FP DMA QUEUED 207
- • WRITE FP DMA QUEUED 207
- Status information 212
- Password information 213
- Sector offset (7-0) 222
- 5.3.3 Error posting 242
- 5.4 Command Protocol 244
- • READ DMA (EXT) 249
- • IDENTFY DEVICE 249
- • IDENTFY DEVICE DMA 249
- DMA Active 250
- 5.4 Command Protocol 253
- C141-E239 5-177 253
- 5.5 Power-on and COMRESET 254
- C141-E239 5-179 255
- CHAPTER 6 Operations 257
- 6.1 Reset and Diagnosis 258
- 6.1 Reset and Diagnosis 259
- C141-E239 6-3 259
- earlier than the host) 259
- 6.1.2 Response to COMRESET 260
- • Security mode state 261
- • SECURITY FREEZE LOCK 261
- • SECURITY UNLOCK 261
- 6.2 Power Save 264
- 6.2.2 Power commands 266
- 6.4 Read-ahead Cache 269
- 6.4.2 Caching operation 270
- 273
- 6.5 Write Cache 276
- IMPORTANT 277
- Glossary 279
- Acronyms and Abbreviations 283
- Comment Form 291
- C141-E239-01EN 293
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