Fujitsu MHV2120AT User Manual Page 1

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Summary of Contents

Page 1 - C141-E218-01EN

C141-E218-01EN MHV2120AT, MHV2100AT, MHV2080AT MHV2060AT, MHV2040AT DISK DRIVE PRODUCT MANUAL

Page 2 - FOR SAFE OPERATION

This page is intentionally left blank.

Page 3 - Revision History

Interface 5-24 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head No.

Page 4

5.3 Host Commands C141-E218 5-25 (4) WRITE VERIFY (X’3C’) This command operates similarly to the WRITE SECTOR(S) command except that the device ve

Page 5 - Preface

Interface 5-26 C141-E218 (5) READ VERIFY SECTOR(S) (X’40’ or X’41’) This command operates similarly to the READ SECTOR(S) command except that the

Page 6 - Conventions

5.3 Host Commands C141-E218 5-27 (6) SEEK (X’70’ to X’7F’) This command performs a seek operation to the track and selects the head specified in t

Page 7 - Liability Exception

Interface 5-28 C141-E218 (7) EXECUTE DEVICE DIAGNOSTIC (X’90’) This command performs an internal diagnostic test (self-diagnosis) of the device.

Page 8

5.3 Host Commands C141-E218 5-29 attention: The device responds to this command with the result of power-on diagnostic test. At command issuance (I

Page 9 - Important Alert Items

Interface 5-30 C141-E218 (8) INITIALIZE DEVICE PARAMETERS (X’91’) The host system can set the number of sectors per track and the maximum head nu

Page 10

5.3 Host Commands C141-E218 5-31 (9) DOWNLOAD MICROCODE (X’92’) At command issuance (I/O registers setting contents) 1F7h(CM) 1 0 0 1 0 0 1 0 1F

Page 11 - Manual Organization

Interface 5-32 C141-E218 Table 5.5 Operation of DOWNLOAD MICROCODE Host Command Movement of device Subcommand code (FR Reg) Sector count (SN, SC

Page 12

5.3 Host Commands C141-E218 5-33 (10) STANDBY IMMEDIATE (X’94’ or X’E0’) Upon receipt of this command, the device sets the BSY bit of the Status r

Page 13 - Contents

C141-E218 vii Manual Organization MHV2120AT, MHV2100AT, MHV2080AT, MHV2060AT, MHV2040AT DISK DRIVE PRODUCT MANUAL (C141-E218) <This manual>

Page 14

Interface 5-34 C141-E218 (11) IDLE IMMEDIATE (X’95’ or X’E1’) / UNLOAD IMMEDIATE (X’E1’) • Default function Upon receipt of this command, the d

Page 15

5.3 Host Commands C141-E218 5-35 Even if the device executes reading look-ahead operation or executes writing operation, the device unloads the head

Page 16

Interface 5-36 C141-E218 (12) STANDBY (X’96’ or X’E2’) Upon receipt of this command, the device sets the BSY bit of the Status register and enter

Page 17

5.3 Host Commands C141-E218 5-37 (13) IDLE (X’97’ or X’E3’) Upon receipt of this command, the device sets the BSY bit of the Status register, and

Page 18

Interface 5-38 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H

Page 19

5.3 Host Commands C141-E218 5-39 (14) CHECK POWER MODE (X’98’ or X’E5’) The host checks the power mode of the device with this command. The host s

Page 20 - Illustrations

Interface 5-40 C141-E218 (15) SLEEP (X’99’ or X’E6’) This command is the only way to make the device enter the sleep mode. Upon receipt of this c

Page 21

5.3 Host Commands C141-E218 5-41 (16) SMART (X’B0) This command predicts the occurrence of device failures depending on the subcommand specified i

Page 22

Interface 5-42 C141-E218 Table 5.7 Features register values (subcommands) and functions (1 of 3) Features Resister Function X’D0’ SMART READ DAT

Page 23

5.3 Host Commands C141-E218 5-43 Table 5.7 Features register values (subcommands) and functions (2 of 3) Features Resister Function X’D5’ SMART R

Page 24

This page is intentionally left blank.

Page 25 - CHAPTER 1 Device Overview

Interface 5-44 C141-E218 Table 5.7 Features register values (subcommands) and functions (3 of 3) Features Resister Function X’DA’ SMART RETURN S

Page 26 - 1.1 Features

5.3 Host Commands C141-E218 5-45 At command issuance (I-O registers setting contents) 1F7H(CM) 1 0 1 1 0 0 0 0 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H(

Page 27 - 1.1.3 Interface

Interface 5-46 C141-E218 Table 5.8 Format of device attribute value data Byte Item 00 01 Data format version number 02 Attribute 1 Attribute ID

Page 28 - 1.2 Device Specifications

5.3 Host Commands C141-E218 5-47 • Data format version number The data format version number indicates the version number of the data format of the

Page 29

Interface 5-48 C141-E218 • Status Flag Bit Meaning 0 If this bit is 1, it indicates normal operations are assured with the attribute when the at

Page 30 - 1.3 Power Requirements

5.3 Host Commands C141-E218 5-49 Table 5.10 Off-line data collection status Status Byte Meaning 00h or 80h Off-line data acquisition is not exec

Page 31

Interface 5-50 C141-E218 • Off-line data collection capability Indicates the method of off-line data collection carried out by the drive. If the

Page 32

5.3 Host Commands C141-E218 5-51 • Error logging capability Table 5.14 Error logging capability Bit Meaning 0 If this bit is 1, it indicates tha

Page 33 - 1.6 Shock and Vibration

Interface 5-52 C141-E218 • SMART error logging If the device detects an unrecoverable error during execution of a command received from the host,

Page 34 - 1.7 Reliability

5.3 Host Commands C141-E218 5-53 Table 5.16 Data format of SMART Summary Error Log Byte Item 00 Version of this function 01 Pointer for the lates

Page 35 - 1.10 Load/Unload Function

C141-E218 ix Contents CHAPTER 1 Device Overview...1-1 1.1 Features ...

Page 36

Interface 5-54 C141-E218 • Command data structure Indicates the command received when an error occurs. • Error data structure Indicates the statu

Page 37

5.3 Host Commands C141-E218 5-55 • SMART self-test The host computer can issue the SMART Execute Off-line Immediate sub-command (FR Register = D4h)

Page 38

Interface 5-56 C141-E218 Table 5.19 Selective self-test log data structure Offset Description Initial 00h, 01h Data Structure Revision Number 01h,

Page 39

5.3 Host Commands C141-E218 5-57 • Feature flags Table 5.20 Selective self-test feature flags Bit Description 0 Vendor specific (unused) 1 When

Page 40 - 2.1 Device Configuration

Interface 5-58 C141-E218 (17) DEVICE CONFIGURATION (X'B1') Individual Device Configuration Overlay feature set commands are identified

Page 41 - 2.2 System Configuration

5.3 Host Commands C141-E218 5-59 • DEVICE CONFIGURATION RESTORE (FR = C0h) The DEVICE CONFIGURATION RESTORE command disables any setting previousl

Page 42 - 2.2.3 2 drives connection

Interface 5-60 C141-E218 bit. After execution of this command, the settings are kept for the device power down or reset. If the restriction of Mul

Page 43

5.3 Host Commands C141-E218 5-61 Table 5.21 DEVICE CONFIGURATION IDENTIFY data structure Word Value Content 0 X'0001' Data structure r

Page 44 - 3.1 Dimensions

Interface 5-62 C141-E218 Word Value Content 8-254 X'0000' Reserved 255 X'xxA5' Integrity word. Bits 15:8 contains the data

Page 45 - 3.2 Mounting

5.3 Host Commands C141-E218 5-63 (18) READ MULTIPLE (X’C4’) The READ MULTIPLE Command performs the same as the READ SECTOR(S) Command except that

Page 46

Contents x C141-E218 CHAPTER 3 Installation Conditions ... 3-1 3.1 Dimensions ...

Page 47

Interface 5-64 C141-E218 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 0 0 0 1 0 0 1F6H(DH) x L x DV Start head No. / LBA

Page 48

5.3 Host Commands C141-E218 5-65 (19) WRITE MULTIPLE (X’C5’) This command is similar to the WRITE SECTOR(S) command. The device does not generate

Page 49

Interface 5-66 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head No.

Page 50

5.3 Host Commands C141-E218 5-67 (20) SET MULTIPLE MODE (X’C6’) This command enables the device to perform the READ MULTIPLE and WRITE MULTIPLE co

Page 51 - 3.3 Cable Connections

Interface 5-68 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H

Page 52 - 3.3.3 Device connection

5.3 Host Commands C141-E218 5-69 (21) READ DMA (X’C8’ or X’C9’) This command operates similarly to the READ SECTOR(S) command except for following

Page 53 - 3.4 Jumper Settings

Interface 5-70 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head No.

Page 54

5.3 Host Commands C141-E218 5-71 (22) WRITE DMA (X’CA’ or X’CB’) This command operates similarly to the WRITE SECTOR(S) command except for followi

Page 55 - 3.4.4 CSEL setting

Interface 5-72 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head No.

Page 56

5.3 Host Commands C141-E218 5-73 (23) READ BUFFER (X’E4’) The host system can read the current contents of the data buffer of the device by issuin

Page 57

Contents C141-E218 xi 4.6.2 Write circuit...4-9 4.6.3 R

Page 58 - 4.2 Subassemblies

Interface 5-74 C141-E218 (24) FLUSH CACHE (X’E7’) This command is used to order to write every write cache data stored by the device into the med

Page 59 - 4.3 Circuit Configuration

5.3 Host Commands C141-E218 5-75 (25) WRITE BUFFER (X’E8’) The host system can overwrite the contents of the data buffer of the device with a desi

Page 60 - 3.3V 1.2V

Interface 5-76 C141-E218 (26) IDENTIFY DEVICE (X’EC’) The host system issues the IDENTIFY DEVICE command to read parameter information from the d

Page 61 - C141-E218 4-5

5.3 Host Commands C141-E218 5-77 (27) IDENTIFY DEVICE DMA (X’EE’) When this command is not used to transfer data to the host in DMA mode, this com

Page 62 - 4.4 Power-on Sequence

Interface 5-78 C141-E218 Table 5.22 Information to be read by IDENTIFY DEVICE command (1 of 2) Word Value Description 0 X’045A’ General Configu

Page 63 - 4.5 Self-calibration

5.3 Host Commands C141-E218 5-79 Table 5.22 Information to be read by IDENTIFY DEVICE command (2 of 2) Word Value Description 65 X’0078’ Minimum

Page 64

Interface 5-80 C141-E218 Bit 14-8: Undefined Bit 7: Removable disk drive = 1 Bit 6: Fixed drive = 1 Bit 5-3: Undefined Bit 2: IDENTIFY DEVICE

Page 65 - 4.6 Read/write Circuit

5.3 Host Commands C141-E218 5-81 *5 Word 50: Device capability Bit 15: 0 Bit 14: 1 Bit 13 to 1 Reserved Bit 0 Standby timer value '1'

Page 66 - 4.6.3 Read circuit

Interface 5-82 C141-E218 *10 Word 64: Advance PIO transfer mode support status Bit 15-8: Reserved Bit 7-0: Advance PIO transfer mode Bit 1: 1 =

Page 67 - 4.6.4 Digital PLL circuit

5.3 Host Commands C141-E218 5-83 *13 WORD 83 Bit 15: = 0 Bit 14: = 1 Bit 13: * '1' = FLUSH CACHE EXT command supported. Bit 12: '

Page 68 - 4.7 Servo Control

Contents xii C141-E218 (12) STANDBY (X’96’ or X’E2’) ...5-36 (13) IDLE (X’97’ or X’E3’)...

Page 69

Interface 5-84 C141-E218 Bit 6: * '1' =Supports the WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT commands Bit 5: * '1' = Supp

Page 70

5.3 Host Commands C141-E218 5-85 *16 WORD 86 Bits 15-14: Reserved Bit 13: * '1' = FLUSH CACHE EXT command supported. Bit 12: '1&apo

Page 71

Interface 5-86 C141-E218 Bit 5: * '1' = Supports the General Purpose Logging feature set Bit 4: '1' = Valid Configure Stream

Page 72

5.3 Host Commands C141-E218 5-87 Bits 12-8: In the case of Device 1 (slave drive), a valid value is set. Bit 12: Reserved Bit 11: '1' =

Page 73 - 4.7.3 Servo frame format

Interface 5-88 C141-E218 *23 WORD 128 Bit 15-9: Reserved Bit 8: Security level. 0: High, 1: Maximum Bit 7-6: Reserved Bit 5: '1' =

Page 74

5.3 Host Commands C141-E218 5-89 (28) SET FEATURES (X’EF’) The host system issues the SET FEATURES command to set parameters in the Features regis

Page 75 - 4.7.5 Spindle motor control

Interface 5-90 C141-E218 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 0 1 1 1 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H(CL) 1F3

Page 76

5.3 Host Commands C141-E218 5-91 Multiword DMA transfer mode X 00100 000 (X’20’: Mode 0) 00100 001 (X’21’: Mode 1) 00100 010 (X’22’: Mode

Page 77 - CHAPTER 5 Interface

Interface 5-92 C141-E218 *3) Automatic Acoustic Management (AAM) The host writes to the Sector Count register with the requested acoustic mana

Page 78 - 5.1 Physical Interface

5.3 Host Commands C141-E218 5-93 (29) SECURITY SET PASSWORD (X’F1’) This command enables a user password or master password to be set. The host tr

Page 79

Contents C141-E218 xiii (45) WRITE MULTIPLE EXT (X’39’): Option (customizing)...5-120 (46) WRITE DMA FUA EXT (X’3D’): Option (customizing)

Page 80

Interface 5-94 C141-E218 At command issuance (I-O register contents) 1F7h(CM) 1 1 1 1 0 0 0 1 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(CL) 1F3h(SN) 1F

Page 81

5.3 Host Commands C141-E218 5-95 (30) SECURITY UNLOCK(X’F2’) This command cancels LOCKED MODE. The host transfers the 512-byte data shown in Table

Page 82 - 5.2 Logical Interface

Interface 5-96 C141-E218 At command completion (I-O register contents) 1F7h(ST) Status information 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(CL) 1F3h(SN

Page 83 - 5.2.1 I/O registers

5.3 Host Commands C141-E218 5-97 (31) SECURITY ERASE PREPARE (X’F3’) The SECURITY ERASE UNIT command feature is enabled by issuing the SECURITY ER

Page 84

Interface 5-98 C141-E218 (32) SECURITY ERASE UNIT (X’F4’) This command erases all user data. This command also invalidates the user password and

Page 85

5.3 Host Commands C141-E218 5-99 (33) SECURITY FREEZE LOCK (X’F5’) This command puts the device into FROZEN MODE. The following commands used to

Page 86

Interface 5-100 C141-E218 At command issuance (I-O register contents) 1F7h(CM) 1 1 1 1 0 1 0 1 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(CL) 1F3h(SN) 1

Page 87

5.3 Host Commands C141-E218 5-101 (34) SECURITY DISABLE PASSWORD (X’F6’) This command invalidates the user password already set and releases the l

Page 88

Interface 5-102 C141-E218 At command completion (I-O register contents) 1F7h(ST) Status information 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(CL) 1F3h(S

Page 89

5.3 Host Commands C141-E218 5-103 (35) READ NATIVE MAX ADDRESS (X’F8’) This command posts the maximum address intrinsic to the device, which can b

Page 90 - 5.3 Host Commands

Contents xiv C141-E218 5.6.3.1 Initiating an Ultra DMA data in burst... 5-151 5.6.3.2 Ultra DMA data burst timi

Page 91

Interface 5-104 C141-E218 (36) SET MAX (X’F9’) SET MAX features register values Value Command 00h Obsolete 01h SET MAX SET PASSWORD 02h SET MA

Page 92

5.3 Host Commands C141-E218 5-105 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x L x DV Max head/LBA [MSB

Page 93

Interface 5-106 C141-E218 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN

Page 94 - 5.3.2 Command descriptions

5.3 Host Commands C141-E218 5-107 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H

Page 95

Interface 5-108 C141-E218 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H(CL) 1F

Page 96

5.3 Host Commands C141-E218 5-109 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H

Page 97

Interface 5-110 C141-E218 (37) READ SECTOR(S) EXT (X’24’): Option (customizing) • Description This command is the extended command of the READ

Page 98

5.3 Host Commands C141-E218 5-111 (38) READ DMA EXT (X’25’): Option (customizing) • Description This command is the extended command of the READ

Page 99

Interface 5-112 C141-E218 (39) READ NATIVE MAX ADDRESS EXT (X’27’): Option (customizing) • Description This command is used to assign the highe

Page 100

5.3 Host Commands C141-E218 5-113 (40) READ MULTIPLE EXT (X’29’): Option (customizing) • Description This command is the extended command of the

Page 101

Contents C141-E218 xv 6.4.3.1 Miss-hit ...6-15 6.4.3.2 Sequent

Page 102

Interface 5-114 C141-E218 (41) READ LOG EXT (X'2F') [Optional command (Customize)] • Description This command reads data from the gener

Page 103

5.3 Host Commands C141-E218 5-115 Log address: Log number of the log to be read Sector offset: First log sector subject to the data transfer Sector

Page 104

Interface 5-116 C141-E218 (42) WRITE SECTOR(S) EXT (X’34’): Option (customizing) • Description This command is the extended command of the WRIT

Page 105

5.3 Host Commands C141-E218 5-117 (43) WRITE DMA EXT (X’35’): Option (customizing) • Description This command is the extended command of the WRI

Page 106

Interface 5-118 C141-E218 (44) SET MAX ADDRESS EXT (X’37’): Option (customizing) • Description This command limits specifications so that the h

Page 107

5.3 Host Commands C141-E218 5-119 At command issuance (I/O registers setting contents) 1F7h(CM) 0 0 1 1 0 1 1 1 1F6h(DH) 1 L 1 DV xx 1F5h(CH) P 1

Page 108

Interface 5-120 C141-E218 (45) WRITE MULTIPLE EXT (X’39’): Option (customizing) • Description This command is the extended command of the WRITE

Page 109

5.3 Host Commands C141-E218 5-121 (46) WRITE DMA FUA EXT (X’3D’): Option (customizing) • Description The WRITE DMA FUA EXT command has the diffe

Page 110 - • Default function

Interface 5-122 C141-E218 (47) WRITE LOG EXT (X’3F’) [Optional command (Customize)] • Description This command writes data to the general-purpos

Page 111

5.3 Host Commands C141-E218 5-123 Log address: Log number of the log to be written Sector offset: First log sector subject to the data transfer Se

Page 112

FOR SAFE OPERATION Handling of This Manual This manual contains important information for using this product. Read thoroughly before using the produc

Page 113

Contents xvi C141-E218 Illustrations Figures Figure 1.1 Negative voltage at +5 V when power is turned off ... 1-6 Figure 1.2

Page 114

Interface 5-124 C141-E218 (48) READ VERIFY SECTOR(S) EXT (X’42): Option (customizing) • Description This command is the extended command of the

Page 115

5.3 Host Commands C141-E218 5-125 (49) WRITE MULTIPLE FUA EXT (X’CE’): Option (customizing) • Description The WRITE MULTIPLE FUA EXT command has

Page 116

Interface 5-126 C141-E218 (50) FLUSH CACHE EXT (X’EA’): Option (customizing) • Description This command executes the same operation as the Flus

Page 117

5.3 Host Commands C141-E218 5-127 5.3.3 Error posting Table 5.27 lists the defined errors that are valid for each command. Table 5.27 Command code

Page 118

Interface 5-128 C141-E218 Table 5.27 Command code and parameters (2 of 2) Error Register (X '1F1') Status Register (X '1F7')

Page 119

5.4 Command Protocol C141-E218 5-129 5.4 Command Protocol The host should confirm that the BSY bit of the Status register of the device is 0 prior

Page 120

Interface 5-130 C141-E218 f) The drive clears DRQ bit to 0. If transfer of another sector is requested, the device sets the BSY bit and steps d)

Page 121

5.4 Command Protocol C141-E218 5-131 For transfer of a sector of data, the host needs to read Status register (X’1F7’) in order to clear INTRQ (int

Page 122

Interface 5-132 C141-E218 5.4.2 PIO Data transferring commands from host to device The execution of the following commands involves Data transfer

Page 123 - • Attribute ID

5.4 Command Protocol C141-E218 5-133 40 ms Figure 5.5 WRITE SECTOR(S) command protocol For transfer of a sector of data, the host needs to read St

Page 124 - • Raw attribute value

Contents C141-E218 xvii Figure 5.2 Execution example of READ MULTIPLE command ...5-63 Figure 5.3 READ SECTOR(S) COMMAND protoco

Page 125

Interface 5-134 C141-E218 5.4.3 Commands without data transfer Execution of the following commands does not involve data transfer between the host

Page 126

5.4 Command Protocol C141-E218 5-135 Figure 5.6 Protocol for the command execution without data transfer 5.4.4 Other commands • READ MULTIPLE (E

Page 127 - • Check sum

Interface 5-136 C141-E218 f) When the command execution is completed, the device clears both BSY and DRQ bits and asserts the INTRQ signal. Then,

Page 128 - • SMART error logging

5.5 Ultra DMA Feature Set C141-E218 5-137 5.5 Ultra DMA Feature Set 5.5.1 Overview Ultra DMA is a data transfer protocol used with the READ DMA an

Page 129

Interface 5-138 C141-E218 Both the host and device perform a CRC function during an Ultra DMA burst. At the end of an Ultra DMA burst the host sen

Page 130 - • Status

5.5 Ultra DMA Feature Set C141-E218 5-139 7) The host shall release DD (15:0) within tAZ after asserting DMACK-. 8) The device may assert DSTROBE

Page 131 - • Self-test index

Interface 5-140 C141-E218 2) The device shall pause an Ultra DMA burst by not generating DSTROBE edges. NOTE - The host shall not immediately asse

Page 132 - Initial

5.5 Ultra DMA Feature Set C141-E218 5-141 6) The host shall drive DD (15:0) no sooner than tZAH after the device has negated DMARQ. For this step,

Page 133 - • Feature flags

Interface 5-142 C141-E218 4) If the host negates HDMARDY- within tSR after the device has generated a DSTROBE edge, then the host shall be prepare

Page 134

5.5 Ultra DMA Feature Set C141-E218 5-143 5.5.4 Ultra DMA data out commands 5.5.4.1 Initiating an Ultra DMA data out burst The following steps sha

Page 135

Contents xviii C141-E218 Tables Table 1.1 Specifications ... 1-4

Page 136

Interface 5-144 C141-E218 5.5.4.2 The data out transfer The following steps shall occur in the order they are listed unless otherwise specifically

Page 137

5.5 Ultra DMA Feature Set C141-E218 5-145 5.5.4.4 Terminating an Ultra DMA data out burst a) Host terminating an Ultra DMA data out burst The foll

Page 138

Interface 5-146 C141-E218 b) Device terminating an Ultra DMA data out burst The following steps shall occur in the order they are listed unless ot

Page 139

5.5 Ultra DMA Feature Set C141-E218 5-147 13) The host shall neither negate STOP nor HSTROBE until at least tACK after negating DMACK-. 14) The ho

Page 140

Interface 5-148 C141-E218 i) The CRC generator polynomial is : G (X) = X16 + X12 + X5 + 1. Note: Since no bit clock is available, the recommende

Page 141

5.6 Timing C141-E218 5-149 5.6 Timing 5.6.1 PIO data transfer Figure 5.9 shows of the data transfer timing between the device and the host system.

Page 142

Interface 5-150 C141-E218 5.6.2 Multiword data transfer Figure 5.10 shows the multiword DMA data transfer timing between the device and the host s

Page 143

5.6 Timing C141-E218 5-151 5.6.3 Ultra DMA data transfer Figures 5.11 through 5.20 define the timings associated with all phases of Ultra DMA burst

Page 144

Interface 5-152 C141-E218 5.6.3.2 Ultra DMA data burst timing requirements Table 5.29 Ultra DMA data burst timing requirements (1 of 2) NAME MOD

Page 145

5.6 Timing C141-E218 5-153 Table 5.29 Ultra DMA data burst timing requirements (2 of 2) MODE 0 (in ns) MODE 1 (in ns) MODE 2 (in ns) MODE 3 (in ns)

Page 146

Contents C141-E218 xix Table 5.25 Relationship between combination of Identifier and Security level, and operation of the lock function...

Page 147

Interface 5-154 C141-E218 Table 5.30 Ultra DMA sender and recipient timing requirements MODE 0 (in ns) MODE 1 (in ns) MODE 2 (in ns) MODE 3 (in n

Page 148

5.6 Timing C141-E218 5-155 5.6.3.3 Sustained Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes.

Page 149 - (CM) 1 1 1 0 0 1 0 0

Interface 5-156 C141-E218 5.6.3.4 Host pausing an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Mo

Page 150

5.6 Timing C141-E218 5-157 5.6.3.5 Device terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra

Page 151

Interface 5-158 C141-E218 5.6.3.6 Host terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DM

Page 152

5.6 Timing C141-E218 5-159 5.6.3.7 Initiating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Mod

Page 153

Interface 5-160 C141-E218 5.6.3.8 Sustained Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes.

Page 154

5.6 Timing C141-E218 5-161 5.6.3.9 Device pausing an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA

Page 155

Interface 5-162 C141-E218 5.6.3.10 Host terminating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra

Page 156

5.6 Timing C141-E218 5-163 5.6.3.11 Device terminating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultr

Page 157

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Page 158

Interface 5-164 C141-E218 5.6.4 Power-on and reset Figure 5.21 shows power-on and reset (hardware and software reset) timing. (1) Only master dev

Page 159

C141-E218 6-1 CHAPTER 6 Operations 6.1 Device Response to the Reset 6.2 Power Save 6.3 Defect Processing 6.4 Read-ahead Cache 6.5 Write Cache

Page 160

Operations 6-2 C141-E218 6.1 Device Response to the Reset This section describes how the PDIAG- and DASP- signals responds when the power of the I

Page 161

6.1 Device Response to the Reset C141-E218 6-3 Max. 31 sec.Max. 450 ms.Max. 30 sec.Max. 1 ms.If presence of a slave device isconfirmed, PDIAG- is c

Page 162

Operations 6-4 C141-E218 After the slave device receives the hardware reset, the slave device shall report its presence and the result of the self-

Page 163

6.1 Device Response to the Reset C141-E218 6-5 6.1.3 Response to software reset The master device does not check the DASP- signal for a software re

Page 164

Operations 6-6 C141-E218 6.1.4 Response to diagnostic command When the master device receives an EXECUTE DEVICE DIAGNOSTIC command and the slave d

Page 165

6.2 Power Save C141-E218 6-7 6.2 Power Save The host can change the power consumption state of the device by issuing a power command to the device.

Page 166

Operations 6-8 C141-E218 • Upon receipt of a hard reset • Upon receipt of Idle/Idle Intermediate (4) Standby mode In this mode, the spindle motor

Page 167

6.3 Defect Processing C141-E218 6-9 6.2.2 Power commands The following commands are available as power commands. • IDLE • IDLE IMMEDIATE • STAND

Page 168

C141-E218 1-1 CHAPTER 1 Device Overview 1.1 Features 1.2 Device Specifications 1.3 Power Requirements 1.4 Environmental Specifications 1.5 Acoustic

Page 169

Operations 6-10 C141-E218 6.3.2 Alternating processing for defective sectors The following two types of technology are used for alternating proces

Page 170

6.3 Defect Processing C141-E218 6-11 (3) Automatic alternating processing This technology assigns a defective sector to a spare sector of a spare c

Page 171

Operations 6-12 C141-E218 6.4 Read-ahead Cache Read-ahead Cache is the function for automatically reading data blocks upon completion of the read

Page 172

6.4 Read-ahead Cache C141-E218 6-13 6.4.2 Caching operation The caching operation is performed only when the commands listed below are received. I

Page 173

Operations 6-14 C141-E218 1)-1 Any command other than the following commands is issued. (All caching-target data is invalidated.) RECALIBRATE IDLE

Page 174

6.4 Read-ahead Cache C141-E218 6-15 6.4.3 Using the read segment buffer Methods of using the read segment buffer are explained for following situat

Page 175

Operations 6-16 C141-E218 6.4.3.2 Sequential hit When the read command that is targeted at a sequential address is received after execution of the

Page 176

6.4 Read-ahead Cache C141-E218 6-17 6.4.3.3 Full hit In this situation, all read requested data is stored in the data buffer. Transfer of the rea

Page 177

Operations 6-18 C141-E218 6.4.3.4 Partial hit In this situation, a part of read requested data including the top sector is stored in the data buff

Page 178

6.5 Write Cache C141-E218 6-19 6.5 Write Cache Write Cache is the function for reducing the command processing time by separating command control t

Page 179

Device Overview 1-2 C141-E218 1.1 Features 1.1.1 Functions and performance The following features of the disk drive are described. (1) Compact Th

Page 180 - • SET MAX ADDRESS

Operations 6-20 C141-E218 (3) Status report in the event of an error The status report concerning an error occurring during writing onto media is

Page 181

6.5 Write Cache C141-E218 6-21 If Write Cache is enabled, there is a possibility that data transferred from the host with the Write Cache enable co

Page 182 - Password information

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Page 183

C141-E218 GL-1 Glossary Actuator Head positioning assembly. The actuator consists of a voice coil motor and head arm. If positions the read-writ

Page 184 - • SET MAX UNLOCK

Glossary GL-2 C141-E218 MTBF Mean time between failures. The MTBF is calculated by dividing the total operation time (total power-on time) by the

Page 185

Glossary C141-E218 GL-3 Status The status is a piece of one-byte information posted from the drive to the host when command execution is ended. Th

Page 186 - • Description

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Page 187

C141-E218 AB-1 Acronyms and Abbreviations A ABRT Aborted command AIC Automatic idle control AMNF Address mark not found ATA AT attachment AWG A

Page 188

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Page 189

C141-E218 IN-1 Index 1 drive connection ... 2-3 2 drives configuration... 2-4 2 drives

Page 190 - Sector offset (7-0)

1.1 Features C141-E218 1-3 MHV2080AT, MHV2100AT, MHV2120AT]. The Sound Pressure level is 16dB [MHV2040AT]/24dB [MHV2060AT, MHV2080AT, MHV2100AT,

Page 191

Index IN-2 C141-E218 data format of SMART summary error log...5-53 data format version number...

Page 192

Index C141-E218 IN-3 host terminating ultra DMA data in burst ... 5-158 out burst ...

Page 193

Index IN-4 C141-E218 protocol for command abort ...5-131 protocol for the command execution without data transfer...

Page 194

Index C141-E218 IN-5 STANDBY IMMEDIATE ...5-33, 6-9 STANDBY IMMEDIATE command... 6-8 standby mode...

Page 195

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Page 196

C141-E218-01EN Comment Form We would appreciate your comments and suggestions regarding this manual. Manual code C141-E218-01EN Manual name MHV

Page 197

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Page 198

MHV2120AT, MHV2100AT, MHV2080AT, MHV2060AT, MHV2040AT DISK DRIVE PRODUCT MANUAL C141-E218-01EN MHV2120AT, MHV2100AT, MHV2080AT, MHV2060

Page 199

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Page 201

Device Overview 1-4 C141-E218 1.2 Device Specifications 1.2.1 Specifications summary Table 1.1 shows the specifications of the disk drives. Table

Page 203 - 5.3.3 Error posting

1.2 Device Specifications C141-E218 1-5 Table 1.1 lists the formatted capacity, number of logical cylinders, number of heads, and number of sect

Page 204 - 5-128 C141-E218

C141-E218 Revision History (1/1) Edition Date Revised section (*1) (Added/Deleted/Altered) Details 01 2004-11-15 *1 Section(s) with

Page 205 - 5.4 Command Protocol

Device Overview 1-6 C141-E218 1.3 Power Requirements (1) Input Voltage • + 5 V ± 5 % (2) Ripple +5 V Maximum 100 mV (peak to peak) Frequen

Page 206

1.3 Power Requirements C141-E218 1-7 (4) Current Requirements and Power Dissipation Table 1.3 lists the current and power dissipation (typical).

Page 207

Device Overview 1-8 C141-E218 (5) Current fluctuation (Typ.) at +5 V when power is turned on Figure 1.2 Current fluctuation (Typ.) at +5 V when

Page 208

1.5 Acoustic Noise C141-E218 1-9 1.5 Acoustic Noise Table 1.5 lists the acoustic noise specification. Table 1.5 Acoustic noise specification Ite

Page 209

Device Overview 1-10 C141-E218 1.7 Reliability (1) Mean time between failures (MTBF) Conditions of 300,000 h Power-on time 250H/month or less

Page 210

1.8 Error Rate C141-E218 1-11 1.8 Error Rate Known defects, for which alternative blocks can be assigned, are not included in the error rate coun

Page 211 - 5.4.4 Other commands

Device Overview 1-12 C141-E218 Emergency Unload other than Unload is performed when the power is shut down while the heads are still loaded on the

Page 212

1.11 Advanced Power Management C141-E218 1-13 Standby: The spindle motor stops. In APM Mode-1, which is the APM default mode, the operation stat

Page 213 - 5.5 Ultra DMA Feature Set

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Page 214 - 5.5.2 Phases of operation

C141-E218 2-1 CHAPTER 2 Device Configuration 2.1 Device Configuration 2.2 System Configuration This chapter describes the internal configuratio

Page 215

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Page 216

Device Configuration 2-2 C141-E218 2.1 Device Configuration Figure 2.1 shows the disk drive. The disk drive consists of a disk enclosure (DE), re

Page 217

2.2 System Configuration C141-E218 2-3 (6) Read/write circuit The read/write circuit uses a LSI chip for the read/write preamplifier. It improves

Page 218

Device Configuration 2-4 C141-E218 2.2.3 2 drives connection (Host adaptor) MHV2120AT MHV2100AT MHV2080AT MHV2060AT MHV2040AT MHV2120AT MHV2100

Page 219

C141-E218 3-1 CHAPTER 3 Installation Conditions 3.1 Dimensions 3.2 Mounting 3.3 Cable Connections 3.4 Jumper Settings This chapter gives the ex

Page 220

Installation Conditions 3-2 C141-E218 3.1 Dimensions Figure 3.1 illustrates the dimensions of the disk drive and positions of the mounting screw h

Page 221

3.2 Mounting C141-E218 3-3 3.2 Mounting For information on mounting, see the "FUJITSU 2.5-INCH HDD INTEGRATION GUIDANCE (C141-E144)." (1)

Page 222

Installation Conditions 3-4 C141-E218 (2) Frame The MR head bias of the HDD disk enclosure (DE) is zero. The mounting frame is connected to SG. U

Page 223 - 5.5.5 Ultra DMA CRC rules

3.2 Mounting C141-E218 3-5 Because of breather hole mounted to the HDD, do not allow this to close during mounting. Locating of breather hole is sh

Page 224

Installation Conditions 3-6 C141-E218 (4) Ambient temperature The temperature conditions for a disk drive mounted in a cabinet refer to the ambient

Page 225 - 5.6 Timing

3.2 Mounting C141-E218 3-7 (5) Service area Figure 3.6 shows how the drive must be accessed (service areas) during and after installation. Figure

Page 226 - DIOR-/DIOW

C141-E218 i Preface This manual describes MHV2120AT, MHV2100AT, MHV2080AT, MHV2060AT, MHV2040AT model of the MHV Series, 2.5-inch hard disk drives.

Page 227

Installation Conditions 3-8 C141-E218 - General notes Figure 3.7 Handling cautions - Installation (1) Please use the driver of a low

Page 228

3.3 Cable Connections C141-E218 3-9 3.3 Cable Connections 3.3.1 Device connector The disk drive has the connectors and terminals listed below for

Page 229

Installation Conditions 3-10 C141-E218 3.3.2 Cable connector specifications Table 3.2 lists the recommended specifications for the cable connector

Page 230

3.4 Jumper Settings C141-E218 3-11 3.3.4 Power supply connector (CN1) Figure 3.10 shows the pin assignment of the power supply connector (CN1). F

Page 231

Installation Conditions 3-12 C141-E218 3.4.2 Factory default setting Figure 3.12 shows the default setting position at the factory. Figure 3.12

Page 232

3.4 Jumper Settings C141-E218 3-13 3.4.4 CSEL setting Figure 3.14 shows the cable select (CSEL) setting. ShortOpenBD2AC1 Note: The CSEL setting i

Page 233

Installation Conditions 3-14 C141-E218 Figure 3.16 Example (2) of cable select 3.4.5 Power up in standby setting When pin C is grounded, the dr

Page 234

C141-E218 4-1 CHAPTER 4 Theory of Device Operation 4.1 Outline 4.2 Subassemblies 4.3 Circuit Configuration 4.4 Power-on Sequence 4.5 Self-calibratio

Page 235

Theory of Device Operation 4-2 C141-E218 4.1 Outline This chapter consists of two parts. First part (Section 4.2) explains mechanical assemblies

Page 236

4.3 Circuit Configuration C141-E218 4-3 4.2.4 Air filter There are two types of air filters: a breather filter and a circulation filter. The breat

Page 237

Preface ii C141-E218 Conventions for Alert Messages This manual uses the following conventions to show the alert messages. An alert message consis

Page 238

Theory of Device Operation 4-4 C141-E218 (4) Controller circuit Major functions are listed below. • ATA interface control and data transfer contro

Page 239 - CS0-, CS1

4.3 Circuit Configuration C141-E218 4-5 MCU & HDC & RDC HDC MCU RDC Data Buffer SDRAM Serial Flash ROM SVC Resonator20MHz R/W Pre-Amp Th

Page 240 - 5.6.4 Power-on and reset

Theory of Device Operation 4-6 C141-E218 Start Self-diagnosis 1 - MPU bus test - Internal register write/read test - Work RAM write/read test P

Page 241 - CHAPTER 6 Operations

4.5 Self-calibration C141-E218 4-7 4.5 Self-calibration The disk drive occasionally performs self-calibration in order to sense and calibrate mecha

Page 242 - 6.1.1 Response to power-on

Theory of Device Operation 4-8 C141-E218 4.5.2 Execution timing of self-calibration Self-calibration is performed once when power is turned on. A

Page 243

4.6 Read/write Circuit C141-E218 4-9 4.6 Read/write Circuit The read/write circuit consists of the read/write preamplifier (PreAMP), the write circ

Page 244

Theory of Device Operation 4-10 C141-E218 4.6.3 Read circuit The head read signal from the PreAMP is regulated by the automatic gain control (AGC)

Page 245

4.6 Read/write Circuit C141-E218 4-11 (3) FIR circuit This circuit is 10-tap sampled analog transversal filter circuit that equalizes the head read

Page 246

Theory of Device Operation 4-12 C141-E218 4.7 Servo Control The actuator motor and the spindle motor are submitted to servo control. The actuator

Page 247 - 6.2 Power Save

4.7 Servo Control C141-E218 4-13 (1) Microprocessor unit (MPU) The MPU executes startup of the spindle motor, movement to the reference cylinder,

Page 248

Preface C141-E218 iii Attention Please forward any comments you may have regarding this manual. To make this manual easier for users to understand,

Page 249 - 6.3 Defect Processing

Theory of Device Operation 4-14 C141-E218 (6) Driver circuit The driver circuit is a power amplitude circuit that receives signals from the spindle

Page 250 - (Not used)

4.7 Servo Control C141-E218 4-15 4.7.2 Data-surface servo format Figure 4.7 describes the physical layout of the servo frame. The three areas indi

Page 251

Theory of Device Operation 4-16 C141-E218 Figure 4.7 Physical sector servo configuration on disk surface OGB Data area IGB expand S

Page 252 - 6.4 Read-ahead Cache

4.7 Servo Control C141-E218 4-17 4.7.3 Servo frame format As the servo information, the IDD uses the phase signal servo generated from the gray cod

Page 253 - 6.4.2 Caching operation

Theory of Device Operation 4-18 C141-E218 4.7.4 Actuator motor control The voice coil motor (VCM) is controlled by feeding back the servo data rec

Page 254

4.7 Servo Control C141-E218 4-19 4.7.5 Spindle motor control Hall-less three-phase twelve-pole motor is used for the spindle motor, and the 3-phase

Page 255

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Page 256 -

C141-E218 5-1 CHAPTER 5 Interface 5.1 Physical Interface 5.2 Logical Interface 5.3 Host Commands 5.4 Command Protocol 5.5 Ultra DMA Feature Set 5.6

Page 257

Interface 5-2 C141-E218 5.1 Physical Interface 5.1.1 Interface signals Figure 5.1 shows the interface signals.

Page 258

5.1 Physical Interface C141-E218 5-3 5.1.2 Signal assignment on the connector Table 5.1 shows the signal assignment on the interface connector. Tab

Page 259 - 6.5 Write Cache

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Page 260

Interface 5-4 C141-E218 [Signal] [I/O] [Description] ENCSEL I This signal is used to set master/slave using the CSEL signal (pin 28). Pins B an

Page 261

5.1 Physical Interface C141-E218 5-5 [Signal] [I/O] [Description] CS0- I Chip select signal decoded from the host address bus. This signal is us

Page 262

Interface 5-6 C141-E218 [Signal] [I/O] [Description] DMARQ O This signal is used for DMA transfer between the host system and the device. The

Page 263 - Glossary

5.2 Logical Interface C141-E218 5-7 5.2.1 I/O registers Communication between the host system and the device is done through input-output (I/O) reg

Page 264

Interface 5-8 C141-E218 Device/Head, Cylinder High, Cylinder Low, Sector Number registers indicate LBA bits 27 to 24, bits 23 to 16, bits 15 to 8,

Page 265

5.2 Logical Interface C141-E218 5-9 - Bit 1: Track 0 Not Found (TK0NF). This bit indicates that track 0 was not found during RECALIBRATE command

Page 266

Interface 5-10 C141-E218 (5) Sector Number register (X’1F3’) The contents of this register indicate the starting sector number for the subsequent

Page 267 - Acronyms and Abbreviations

5.2 Logical Interface C141-E218 5-11 (8) Device/Head register (X’1F6’) The contents of this register indicate the device and the head number. When

Page 268

Interface 5-12 C141-E218 - Bit 7: Busy (BSY) bit. This bit is set whenever the Command register is accessed. Then this bit is cleared when the co

Page 269

5.2 Logical Interface C141-E218 5-13 (10) Command register (X’1F7’) The Command register contains a command code being sent to the device. After

Page 270

C141-E218 v Important Alert Items Important Alert Messages The important alert messages in this manual are as follows: A hazardous situation cou

Page 271

Interface 5-14 C141-E218 (2) Device Control register (X’3F6’) The Device Control register contains device interrupt and software reset. Bit 7 B

Page 272

5.3 Host Commands C141-E218 5-15 Table 5.3 Command code and parameters (1 of 2) COMMAND CODE (Bit) PARAMETER USED COMMAND NAME 7 6 5 4 3 2 1 0 FR

Page 273

Interface 5-16 C141-E218 Table 5.3 Command code and parameters (2 of 2) COMMAND CODE (Bit) PARAMETER USED COMMAND NAME 7 6 5 4 3 2 1 0 FR SC SN

Page 274

5.3 Host Commands C141-E218 5-17 Note: READ LONG (0x22) command/WRITE LONG (0x33) command became a unsupport from the MHV2xxxAT series. Notes: FR:

Page 275 - Comment Form

Interface 5-18 C141-E218 5.3.2 Command descriptions The contents of the I/O registers to be necessary for issuing a command and the example indica

Page 276

5.3 Host Commands C141-E218 5-19 Note: 1. When the L bit is specified to 1, the lower 4 bits of the DH register and all bits of the CH, CL and SN r

Page 277 - C141-E218-01EN

Interface 5-20 C141-E218 (1) RECALIBRATE (X’10’ to X’1F’) This command performs the calibration. Upon receipt of this command, the device sets B

Page 278

5.3 Host Commands C141-E218 5-21 (2) READ SECTOR(S) (X’20’ or X’21’) This command reads data of sectors specified in the Sector Count register fro

Page 279

Interface 5-22 C141-E218 (R: Retry) At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV

Page 280

5.3 Host Commands C141-E218 5-23 (3) WRITE SECTOR(S) (X’30’ or X’31’) This command writes data of sectors from the address specified in the Device

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